There is known a technique for recovering electric energy of an applied pulse such that electric charges accumulated by applying a sustain pulse voltage to a capacitor formed in a plurality of cells constituting a screen of a PDP are recovered by using a capacitor for recovering electric energy. The recovered electric charges are used to apply a next sustain pulse voltage. In this technique, electric charges accumulated in a cell at a rising edge of one applied pulse are recovered at a trailing edge of the applied pulse.
Japanese Patent Publication Laid-Open No. 10-105114 (A) disclosed on Apr. 24, 1998 describes a power recovery apparatus for a PDP which enables charging and discharging power also in application of a negative voltage. This power recovery apparatus includes a positive voltage charging/discharging unit which charges a positive voltage and discharges the charged positive voltage to a discharging electrode in a next electrode discharging state, a negative voltage discharging unit which charges a negative voltage and discharges the charged negative voltage to the discharging electrode in a next electrode discharging state, and a controller which controls inputting of an external voltage and electric charging/discharging by the positive/negative voltage charging/discharging unit.
Patent Document 1: Japanese Patent Publication Laid-Open No. 10-105114
International Patent Publication Laid-Open No. WO 00/00956 (A) published on Jan. 6, 2000 discloses a method and apparatus for generating a control signal which can variably determine a switching timing of a power recovery circuit of a plasma display panel television. A variable range pulse generating unit generates a variable range pulse which determines an allowable maximum variable range of recovery power providing timing, and a first counter is enabled by the variable range pulse, counts clock signals, and periodically outputs a count value. A second counter and a third counter count the numbers of times of switching between a first switch and a second switch to set a first reference value and a second reference value, respectively. A rising pulse generating unit periodically compares the count value with the first reference value. When the count value and the first reference value are equal to each other, a logical level of an output signal is inverted from low to high. A falling pulse generating unit periodically compares the count value with the second reference value. When the count value and the second reference value are equal to each other, the logical level of the output signal is inverted from high to low. An AND gate calculates a logical product between output signals from the rising pulse generating unit and the falling pulse generating unit to generate a control signal. A pulse duration of the control signal is determined by the first reference value and the second reference value. The two reference values can be externally and variably determined.
Patent Document 2: WO 00/00956